Modeling an Aquifer: Numerical Solution to the Groundwater Flow Equation

We present a model of groundwater dynamics under stationary flow and governed by Darcy's Law of water motion through porous media, we apply it to study a 2D aquifer with water table of constant slope comprised of an homogeneous and isotropic media, the more realistic case of an homogeneous anisotropic soil is also considered. Taking into account some geophysical parameters we develop a computational routine, in the Finite Difference Method, that solves the resulting elliptic partial equation, both in a homogeneous isotropic and homogeneous anisotropic media. After calibration of the numerical model, this routine is used to begin a study of the Ayamonte-Huelva aquifer in Spain, a modest analysis of the system is given, we compute the average discharge vector as well as its root mean square as a first predictive approximation of the flux in this system, providing us a signal of the location of best exploitation; long term goal is to develop a complete computational tool for the analysis of groundwater dynamics.Comment: 13 pages and 12 figure

Application of AHP and corrective factors for the determination of best available techniques and emission limit values at installation level: A case study in four cement installations

After the adoption of the Industrial Emissions Directive in the European Union, requirements regarding emission limit values were made legally binding, and the competent authorities shall ensure that they do not exceed the emission levels associated with the best available techniques. This paper describes a two-stage method for the determination of best available techniques (BAT) and emission limit values (ELV) at installation level, applicable to all industrial sectors covered by the IED and to all pollutants to air and to water. This new method may support competent authorities to implement BAT conclusions into the IED permits. The determination of BAT is based on the use of analytical hierarchy process, while the ELV is determined by using corrective factors based on consumption and emission indicators from the installation. The method is applied in a case study on four existing cement installations in the region of Andalucia (Spain)

In the quest of vision-sensors-on-chip: Pre-processing sensors for data reduction

This paper shows that the implementation of vision systems benefits from the usage of sensing front-end chips with embedded pre-processing capabilities - called CVIS. Such embedded pre-processors reduce the number of data to be delivered for ulterior processing. This strategy, which is also adopted by natural vision systems, relaxes system-level requirements regarding data storage and communications and enables highly compact and fast vision systems. The paper includes several proof-o-concept CVIS chips with embedded pre-processing and illustrate their potential advantages. © 2017, Society for Imaging Science and Technology.Office of Naval Research (USA) N00014-14-1-0355Ministerio de Economía y Competitiviad TEC2015-66878-C3-1-R, TEC2015-66878-C3-3-RJunta de Andalucía 2012 TIC 233

Perspectiva de la orientación sobre los recursos en atención a la diversidad

El objetivo de este estudio fue describir y constatar mediante la opinión de los responsables de los Departamentos de Orientación, la incidencia de los recursos en atención a la diversidad en los centros de educación secundaria obligatoria gallegos. En el estudio participaron 75 profesionales con edades entre los 25 y 65 años (M= 44.5; DT= 10.45). Se administró el cuestionario EVADIE y los resultados obtenidos muestran que los centros educativos cuentan con los recursos necesarios para la atención del alumnado diverso, fundamentalmente en personal especializado, formación que responde a las necesidades del profesorado y vinculación con centros externos de apoyo

CMOS-3D smart imager architectures for feature detection

This paper reports a multi-layered smart image sensor architecture for feature extraction based on detection of interest points. The architecture is conceived for 3-D integrated circuit technologies consisting of two layers (tiers) plus memory. The top tier includes sensing and processing circuitry aimed to perform Gaussian filtering and generate Gaussian pyramids in fully concurrent way. The circuitry in this tier operates in mixed-signal domain. It embeds in-pixel correlated double sampling, a switched-capacitor network for Gaussian pyramid generation, analog memories and a comparator for in-pixel analog-to-digital conversion. This tier can be further split into two for improved resolution; one containing the sensors and another containing a capacitor per sensor plus the mixed-signal processing circuitry. Regarding the bottom tier, it embeds digital circuitry entitled for the calculation of Harris, Hessian, and difference-of-Gaussian detectors. The overall system can hence be configured by the user to detect interest points by using the algorithm out of these three better suited to practical applications. The paper describes the different kind of algorithms featured and the circuitry employed at top and bottom tiers. The Gaussian pyramid is implemented with a switched-capacitor network in less than 50 μs, outperforming more conventional solutions.Xunta de Galicia 10PXIB206037PRMinisterio de Ciencia e Innovación TEC2009-12686, IPT-2011-1625-430000Office of Naval Research N00014111031

Ethernet-based timing system for accelerator facilities: The IFMIF-DONES case

This article presents the design of a timing system for accelerator facilities, which relies on a general networking approach based on standard Ethernet protocols that keeps all the devices synchronized to a common time reference. The case of the IFMIF-DONES infrastructure is studied in detail, providing a framework for the implementation of the timing system. The network time protocol (NTP) with software timestamping and the precision time protocol (PTP) with hardware timestamping are used to synchronize devices with sub-millisecond and sub-microsecond accuracy requirements, respectively. The design also considers the utilization of IEEE 1588 high accuracy default PTP profile (PTP-HA) to provide sub-nanosecond accuracy for the most demanding components. Three different solutions for the design of the timing system are discussed in detail. The first solution considers the deployment of one time-dedicated network for each synchronization protocol, while the second one proposes the integration of the synchronization data of NTP and PTP into the networks of the facility. The third solution relies on the single distribution of PTP-HA to all the systems. The final design aims to be fully based on standard technologies and to be cost-efficient, seeking for interoperability and scalability, and minimizing the impact on other systems in the facility. An experimental setup has been implemented to evaluate and discuss the suitability of the solutions for the timing system by studying the synchronization accuracy obtained with NTP, PTP and PTP-HA under different network conditions. It includes a timing evaluation platform that tries to resemble the network architecture foreseen in the facility. The measured results revealed that PTP is the most limiting protocol for the second solution. Using the default PTP configuration, it tolerates less than 20% of maximum bandwidth utilization for symmetric bidirectional flows, and around 30% in the case of unidirectional flows (server to client or client to server), with the current setup and using switches without enabled timing support. This case study provides a better understanding of the trade-off between bandwidth utilization, synchronization accuracy and cost in these kinds of facilities

Offset-compensated comparator with full-input range in 150nm FDSOI CMOS-3d technology

This paper addresses an offset-compensated comparator with full-input range in the 150nm FDSOI CMOS- 3D technology from MIT- Lincoln Laboratory. The comparator discussed here makes part of a vision system. Its architecture is that of a self-biased inverter with dynamic offset correction. At simulation level, the comparator can reach a resolution of 0.1mV in an area of approximately 220μm2 with a time response of less than 40ns and a static power dissipation of 1.125μW

Self-Organized Multi-Camera Network for a Fast and Easy Deployment of Ubiquitous Robots in Unknown Environments

To bring cutting edge robotics from research centres to social environments, the robotics community must start providing affordable solutions: the costs must be reduced and the quality and usefulness of the robot services must be enhanced. Unfortunately, nowadays the deployment of robots and the adaptation of their services to new environments are tasks that usually require several days of expert work. With this in view, we present a multi-agent system made up of intelligent cameras and autonomous robots, which is easy and fast to deploy in different environments. The cameras will enhance the robot perceptions and allow them to react to situations that require their services. Additionally, the cameras will support the movement of the robots. This will enable our robots to navigate even when there are not maps available. The deployment of our system does not require expertise and can be done in a short period of time, since neither software nor hardware tuning is needed. Every system task is automatic, distributed and based on self-organization processes. Our system is scalable, robust, and flexible to the environment. We carried out several real world experiments, which show the good performance of our proposalThis work was supported by the research projects TIN2009-07737, INCITE08PXIB262202PR, and TIN2012-32262, the grant BES-2010-040813 FPI-MICINN, and by the grant “Consolidation of Competitive Research Groups, Xunta de Galicia ref. 2010/6”S

Time-sensitive networking for interlock propagation in the IFMIF-DONES facility

In this study, we have proposed the use of time-sensitive networking (TSN) technologies for the distribution of the interlock signals of the machine protection system of the future IFMIF-DONES particle accelerator, required for implementing the protection mechanisms of the different systems in the facility. Such facilities usually rely on different fieldbus technologies or direct wiring for their transmission, typically leading to complex network infrastructures and interoperability problems. We provide insights of how TSN could simplify the deployment of the interlock network by aggregating all the traffic under the same network infrastructure, whilst guaranteeing the latency and timing constraints. Since TSN is built on top of Ethernet technology, it also benefits from other network services and all its related developments, including redundancy and bandwidth improvements. The main challenge to address is the transmission of the interlock signals with very low latency between devices located in different points of the facility. We have characterized our initial TSN architecture prototype, evaluated the latency and bandwidth obtained with this solution, identified applications to effectively shape the attainable determinism, and found shortcomings and areas of future improvements.Amiga-7 Grant RTI2018-096228-B-C32Programa Operativo FEDER/Junta de Andalucia SINPA Grant SINPA B-TIC-445-UGR18EU DAIS Project 101007273-2Spanish Government FPU20/01857, FPU20/05842Misiones CDTI 2021 framework (DONES-EVO) MIG-20211006European Union via the Euratom Research and Training Programme 10105220